A non-volatile analog memory element in which the stored quantity can be both incremented and decremented is an essential component in a number of novel computer architectures. Associative memories, neural networks and general purpose analog computers may employ analog memory elements.
U.S. Pat. No. 5,027,171, entitled "Dual Polarity Floating Gate MOS Analog Memory Device," describes a nonvolatile memory cell comprising two pairs of complementary metal oxide field effect transistors. Each pair includes a p-channel and an n-channel transistor. The gates of each transistor are electrically connected together to form a common floating gate. The sources of the transistors of the first transistor pair are connected to a common ground. The sources of the second pair of transistors are operably electrically connected together to form an output junction. Sufficiently large positive voltage applied to the drain of the n-channel transistor of the first transistor pair causes a positive charge to be stored in memory, or increases a charge previously stored in memory. Sufficiently large negative voltage applied to the drain of the p-channel transistor of the first transistor pair causes a negative charge to be stored in memory when there previously was no charge stored in memory, or decreases a charge previously stored in memory. The limitations of this device include highly asymmetric charge/discharge, i.e., positive charge (holes) may be injected onto the floating gate at a much slower rate than negative charge (electrons). A problem with such asymmetric charging characteristics is that the device requires extremely long programming times for charging in one direction compared to the time required to charging in the other direction.
U.S. Pat. No. 5,166,562, entitled "Writable Analog Reference Voltage Device," describes a bipolar analog memory in which interpoly tunneling is used for changing the charge on a floating gate in one direction. Hot electron injection from the substrate is used to charge the gate with electrons, resulting in asymmetric write/erase characteristics.
U.S. Pat. No. 5,253,196, entitled "MOS Analog Memory With Injection Capacitors," describes a non-volatile memory element for storing analog information. The value stored in memory can be increased or decreased electrically. Analog memory information is stored as an electrical charge on a floating gate structure. Modification of the stored charge is accomplished by hot carrier injection to transport electrons both onto and off the floating gate. Charge is written onto and off of the floating gate by injection capacitors in deep depletion. Such charge transfer is accomplished by having the floating gate contiguous with a piece of crystalline p-type silicon in which a deep depletion region may be formed. Hot electrons may be ejected from the floating gate structure through surrounding insulating oxide. The floating gate structure is capacitively coupled to a second piece of crystalline silicon from which electrons may be injected onto the floating gate structure. However, this device is manufactured using silicon-on-insulator processes which tends to be relatively expensive and are not as commonly practiced as are bulk silicon processes.
U.S. Pat. No. 5,166,562, entitled "Writable Analog Reference Voltage Storage Device," describes a circuit for generating an N number of analog voltages using an N number of analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal. The hot electron injection from the substrate to charge the gates with electrons results in asymmetric write/erase characteristics.
Therefore, a need exists for a bidirectional, non-volatile memory device having symmetric charge characteristics, and which may be manufactured using relatively inexpensive and common bulk silicon processes.